The present invention relates to videographics display systems of the kind including processing means adapted to control the operation of said display systems, a video random access memory means adapted to store video data to be displayed and monitor means adapted to provide a visual display of the stored data.
In present day computer systems using a videographics display monitor, a high degree of processing power is needed to control the displays, for example when window type or other complex displays are provided. Thus, dedicated graphics processors have become available which unburden the main system processor from much of the processing needed for the information to be displayed on the monitor screen. Also, such computer systems generally utilize commercially available video random access memories (VRAMs) formed of a plurality of VRAM integrated circuit chips. Each chip includes a DRAM (Dynamic Random Access Memory) array and a shift register. An entire row of data is latched into the shift register, leaving the DRAM array free for read/write operations to occur independently of the shift register, which can be used to clock out the data. The shift register may be clocked out at high (video) speed to refresh the monitor screen. VRAM devices available include one Mbit (1 Megabit) devices, arranged as 512 rows by 512 columns, with each column location storing 4 bits. Other sizes of VRAM devices, such as 256 Kbit devices are also available. In addition to the VRAM memory devices for video information, the graphics processor also requires additional storage for program information and for message buffers, font tables, etc. The provision of storage for the graphics processor is a significant cost item for a videographics display system.